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<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.core">
<reg name="r0" bitsize="64" type="uint64"/>
<reg name="r1" bitsize="64" type="uint64"/>
<reg name="r2" bitsize="64" type="uint64"/>
<reg name="r3" bitsize="64" type="uint64"/>
<reg name="r4" bitsize="64" type="uint64"/>
<reg name="r5" bitsize="64" type="uint64"/>
<reg name="r6" bitsize="64" type="uint64"/>
<reg name="r7" bitsize="64" type="uint64"/>
<reg name="r8" bitsize="64" type="uint64"/>
<reg name="r9" bitsize="64" type="uint64"/>
<reg name="r10" bitsize="64" type="uint64"/>
<reg name="r11" bitsize="64" type="uint64"/>
<reg name="r12" bitsize="64" type="uint64"/>
<reg name="r13" bitsize="64" type="uint64"/>
<reg name="r14" bitsize="64" type="uint64"/>
<reg name="r15" bitsize="64" type="uint64"/>
<reg name="r16" bitsize="64" type="uint64"/>
<reg name="r17" bitsize="64" type="uint64"/>
<reg name="r18" bitsize="64" type="uint64"/>
<reg name="r19" bitsize="64" type="uint64"/>
<reg name="r20" bitsize="64" type="uint64"/>
<reg name="r21" bitsize="64" type="uint64"/>
<reg name="r22" bitsize="64" type="uint64"/>
<reg name="r23" bitsize="64" type="uint64"/>
<reg name="r24" bitsize="64" type="uint64"/>
<reg name="r25" bitsize="64" type="uint64"/>
<reg name="r26" bitsize="64" type="uint64"/>
<reg name="r27" bitsize="64" type="uint64"/>
<reg name="r28" bitsize="64" type="uint64"/>
<reg name="r29" bitsize="64" type="uint64"/>
<reg name="r30" bitsize="64" type="uint64"/>
<reg name="r31" bitsize="64" type="uint64"/>
<!-- Note, the following register definitions must be in this file by
the "standard target features" for this processor. GDB will reject
this file description if the following register definitions are
not in this file. Hence, they can't be moved to power64-core2.xml
for consistency with what was done for the shadow register definitions
to get the shadow register print order to match the print order of
the HW registers -->
<reg name="pc" bitsize="64" type="code_ptr" regnum="64"/>
<reg name="msr" bitsize="64" type="uint64"/>
<reg name="cr" bitsize="32" type="uint32"/>
<reg name="lr" bitsize="64" type="code_ptr"/>
<reg name="ctr" bitsize="64" type="uint64"/>
<reg name="xer" bitsize="32" type="uint32"/>
</feature>