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[0] in function chmod in /var/www/hopeinstoughton_www/wp-content/plugins/simple-universal-google-analytics/main.php on line 8
[1] in function include_once in /var/www/hopeinstoughton_www/wp-settings.php on line 560
[2] in function require_once in /var/www/hopeinstoughton_www/wp-config.php on line 85
[3] in function require_once in /var/www/hopeinstoughton_www/wp-load.php on line 50
[4] in function require_once in /var/www/hopeinstoughton_www/wp-blog-header.php on line 13
[5] in function require in /var/www/hopeinstoughton_www/index.php on line 17
403WebShell
403Webshell
Server IP : 94.177.8.99  /  Your IP : 216.73.217.165
Web Server : Apache/2.4.58 (Ubuntu)
System : Linux aries 6.8.0-134-generic #134-Ubuntu SMP PREEMPT_DYNAMIC Fri Jun 26 18:43:11 UTC 2026 x86_64
User : www-data ( 33)
PHP Version : 8.1.34
Disable Function : NONE
MySQL : OFF  |  cURL : ON  |  WGET : ON  |  Perl : ON  |  Python : OFF  |  Sudo : ON  |  Pkexec : OFF
Directory :  /usr/libexec/valgrind/

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Current File : /usr/libexec/valgrind/power64-core-valgrind-s1.xml
<?xml version="1.0"?>
<!-- Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.

     Copying and distribution of this file, with or without modification,
     are permitted in any medium without royalty provided the copyright
     notice and this notice are preserved.  -->

<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.core-valgrind-s1">
  <reg name="r0s1" bitsize="64" type="uint64"/>
  <reg name="r1s1" bitsize="64" type="uint64"/>
  <reg name="r2s1" bitsize="64" type="uint64"/>
  <reg name="r3s1" bitsize="64" type="uint64"/>
  <reg name="r4s1" bitsize="64" type="uint64"/>
  <reg name="r5s1" bitsize="64" type="uint64"/>
  <reg name="r6s1" bitsize="64" type="uint64"/>
  <reg name="r7s1" bitsize="64" type="uint64"/>
  <reg name="r8s1" bitsize="64" type="uint64"/>
  <reg name="r9s1" bitsize="64" type="uint64"/>
  <reg name="r10s1" bitsize="64" type="uint64"/>
  <reg name="r11s1" bitsize="64" type="uint64"/>
  <reg name="r12s1" bitsize="64" type="uint64"/>
  <reg name="r13s1" bitsize="64" type="uint64"/>
  <reg name="r14s1" bitsize="64" type="uint64"/>
  <reg name="r15s1" bitsize="64" type="uint64"/>
  <reg name="r16s1" bitsize="64" type="uint64"/>
  <reg name="r17s1" bitsize="64" type="uint64"/>
  <reg name="r18s1" bitsize="64" type="uint64"/>
  <reg name="r19s1" bitsize="64" type="uint64"/>
  <reg name="r20s1" bitsize="64" type="uint64"/>
  <reg name="r21s1" bitsize="64" type="uint64"/>
  <reg name="r22s1" bitsize="64" type="uint64"/>
  <reg name="r23s1" bitsize="64" type="uint64"/>
  <reg name="r24s1" bitsize="64" type="uint64"/>
  <reg name="r25s1" bitsize="64" type="uint64"/>
  <reg name="r26s1" bitsize="64" type="uint64"/>
  <reg name="r27s1" bitsize="64" type="uint64"/>
  <reg name="r28s1" bitsize="64" type="uint64"/>
  <reg name="r29s1" bitsize="64" type="uint64"/>
  <reg name="r30s1" bitsize="64" type="uint64"/>
  <reg name="r31s1" bitsize="64" type="uint64"/>

<!--  When printing the non-shadow register names/contents, GDB prints the
      GPRs followed by the floating point registers then the pc, msr, ...
      registers. If the shadow GPRs and shadow pc/msr/cr... register
      definitions are all in this file, as is done with the non-shadow register
      definitions, the shadow register name print order changes to GPRs,
      followed by pc/msr/cr... then the floating point registers.  Note, the
      contents of the shadow registers still print in this same order as the
      non-shadow registers values resulting in the shadow register names and
      shadow register values not correctly aligning.

      In order to get, the shadow register names to print in the same order
      as the non-shadow register and correctly align with their contents,
      the following register definitions were moved to the file
      power64-core2-valgrind-s1.xml. The new file is included after the shadow
      floating point XML definition file. By doing this, we get GDB to print
      the shadow register names in the same order as the non-shadow register
      names and thus correctly align with the order that the shadow register
      contents are printed.   -->

<!--  <reg name="pcs1" bitsize="64" type="code_ptr"/>
  <reg name="msrs1" bitsize="64" type="uint64"/>
  <reg name="crs1" bitsize="32" type="uint32"/>
  <reg name="lrs1" bitsize="64" type="code_ptr"/>
  <reg name="ctrs1" bitsize="64" type="uint64"/>
  <reg name="xers1" bitsize="32" type="uint32"/> -->
</feature>

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